A magnetic random access memory (“MRAM”) device is a kind of a non-volatile memory device, which includes a plurality of magnetic memory cells. MRAM uses magnetic charges to store bits of data. In general, the structure of an MRAM device includes, memory cells having non-magnetic film and magnetic film alternately stacked. For example, a memory cell of an MRAM device may include an insulating film interposed between two magnetic films. The memory cell is written by changing the magnetization direction (i.e., polarity) of one of the magnetic films. The change in polarity results in a considerable change in resistance, which is known as the giant magnetoresistive effect (“GMR”). The overall resistance of the magnetic memory cell has a maximum value or a minimum value according to magnetization directions of the magnetic film. For example, if the magnetic directions of the magnetic films are identical with each other, (i.e., a “parallel” state), an overall resistance is relatively low. In the parallel state, the memory cell is clear (e.g. “0”) and considered to be in a logic low (“L”) state. In contrast, if the magnetic directions are adverse to each other, (i.e., an “anti-parallel” state), an overall resistance is relatively high. In the anti-parallel state, the memory cell is holding data (e.g. “1”) and considered to be in a logic high (“H”) state.
To read the logic state of a magnetic memory cell, the MRAM device applies a sense current and a reference current to a target cell and a reference cell, respectively. A voltage drop occurs at both ends of the target cell and the reference cell depending on the respective resistance values of the cells. The voltages of the cells are compared with each other to determine a logic state of the target cell. FIG. 1 shows a conventional 32Kb MRAM memory block including a midpoint reference generator therein. FIG. 1 originates from FIG. 7 of a paper reporting the demonstration of MRAM from the 2002 VLSI Symposia on Technology and Circuits.
Referring to FIG. 1, the midpoint reference generator has four magnetic resistors that are connected in series and parallel. A serially-connected resistor is connected to another serially-connected resistor in parallel resulting in a resistor having a value equal to (Rmax+Rmin)/2. The resistance (Rmax+Rmin)/2 represents a reference resistance that is halfway between the value of a resistance in a logic low (L) state and a logic high (H) state. A problem exists in that the resistance of the midpoint reference generator varies with the level of a bitline clamp voltage (reference voltage) Vref.
Referring to FIG. 2, a difference between a maximum resistor value Rmax and a minimum resistor value Rmin, when the bitline clamp voltage Vref is equal to a set value, is less than a difference therebetween when the bitline clamp voltage Vref is less than the set value. That is, when the level of the bitline clamp voltage Vref is high, a value of the resistor (Rmax+Rmin)/2 is low. In contrast, when the level of the bitline clamp voltage Vref is low, the value of the resistor (Rmax+Rmin)/2 is high. Accordingly, the midpoint reference generator must control the bitline clamp voltage Vref to maintain the desired value of the resistor (Rmax+Rmin)/2. However, the desired bitline clamp voltage can be attained only by trial and error. Further, restructuring of a bitline clamp voltage of the reference cell is considerably troublesome. Therefore, in order to precisely compare a target cell with a reference cell, there is a need for an MRAM device that produces a constant reference output regardless of changes in bitline clamp voltage.